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NVIDIA and Cadence: Streamlining PCB Design with IoT
Technology Category
- Processors & Edge Intelligence - Microcontrollers & Printed Circuit Boards
- Sensors - Liquid Detection Sensors
Applicable Industries
- Electronics
- Equipment & Machinery
Applicable Functions
- Product Research & Development
Use Cases
- Additive Manufacturing
- Time Sensitive Networking
Services
- Hardware Design & Engineering Services
The Challenge
NVIDIA, a leading company in visual computing technologies, was facing a significant challenge in meeting the stringent time-to-market windows for its high-performance gadgets. The company's average design cycle was less than six months, from silicon tapeout to printed circuit boards (PCBs) ready for the marketplace. NVIDIA design teams were using Cadence tools to create their IC package and board designs. They had also developed several in-house tools for ball grid array (BGA) fanout and routing to augment their existing Cadence® Allegro® constraint-driven PCB design flow. However, the pressures of product miniaturization and high-density interconnect (HDI), combined with an increasing number of constraints, was creating new challenges. The question was whether to invest time and resources developing tools to enable HDI, or to adopt a new solution. And since NVIDIA was designing with high-speed constraints but also using “build-up” technology to handle BGA fanout, they would need a highly flexible solution that could address both sets of requirements.
About The Customer
NVIDIA is a leading company in the development of visual computing technologies. It is the inventor of the GPU, a high-performance processor that generates breathtaking, interactive graphics on personal computers, game consoles, and mobile devices such as smartphones. To keep up with consumer demand for such high-performance gadgets, NVIDIA must meet stringent time-to-market windows. The company’s average design cycle is less than six months, from silicon tapeout to printed circuit boards (PCBs) ready for the marketplace. NVIDIA design teams were using Cadence tools to create their IC package and board designs.
The Solution
NVIDIA decided to migrate to the latest Allegro PCB Design technologies, which―starting with the 16.2 release―enable a constraint-driven HDI design flow. The new Cadence flow combines the proven Allegro constraint-driven PCB design flow with a comprehensive set of automation-assisted manufacturing rules for all different styles of HDI designs, from a hybrid build-up/core combination to a complete build-up process. Allegro PCB Editor now includes automation for adding and managing micro vias to shorten the time to create designs that are correct-by-construction. From front-end design creation to signal integrity to back-end layout, the Allegro 16.2 release boosts productivity and predictability while streamlining the product development cycle. The Cadence solution automatically drops the vias in the correct location, which greatly increases efficiency and eliminates previous user-developed and user-maintained workarounds. Now that the NVIDIA team has an integrated HDI design and validation mechanism, they don’t have to spend time building internal automation tools or performing post-processing.
Operational Impact
Quantitative Benefit
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