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Faraday's Transformation with Cadence's Encounter Conformal ECO Designer
技术
- 处理器与边缘智能 - 片上系统
- 传感器 - 液体检测传感器
适用行业
- 建筑物
- 设备与机械
适用功能
- 产品研发
用例
- 时间敏感网络
挑战
Faraday Technology Corporation 是一家领先的无晶圆厂 ASIC 供应商和 SIP 提供商，在更新其工程变更单 (ECO) 流程时面临着重大挑战。 ECO 过程涉及在自动工具处理完逻辑更改后将其直接插入到网表中。这可能包括从设计中添加或删除逻辑到更细微的更改（例如清理路由以确保信号完整性）的任何内容。然而，ECO 可能会带来压力且耗时。传统的手动 ECO 流程是劳动密集型的，并且确保产品正常运行的能力有限。设计人员通常不知道逻辑网表中所做的更改是否可以在物理网表中执行，从而使得手动 ECO 过程既耗时又费力。准确跟踪已使用的备用单元和空闲单元也很困难。
关于客户
智原科技公司是一家领先的无晶圆厂 ASIC 供应商和硅知识产权 (SIP) 提供商。该公司的成功建立在其为客户提供高度定制解决方案的能力之上。智原经过验证和认可的 ASIC、片上系统 (SoC) 和知识产权 (IP) 设计能力和服务使客户能够更好、更快地在芯片上实现他们的想法，并通过更低的成本和更高的产品获得竞争优势差异化。自1993年成立以来，智原提供专业的ASIC设计服务，配备完善的ASIC基础设施和平均经验超过10年的团队成员。 Faraday 的内部 IP 包括数千个 ARM 兼容 CPU、高速 I/O、内存接口以及库、内存、PLL 和稳压器等基础 IP。
解决方案
为了应对 ECO 挑战，Faraday 决定实施 Cadence 的 Encounter Conformal ECO Designer。该工具提供功能性 ECO 分析和优化以及生成功能。它结合了经过验证的等效性和功能检查，并使用形式化技术来分析、抽象和实施 ECO。 Conformal ECO Designer 会比较设计中的每个逻辑锥，确定哪些锥不同，并确定完成 ECO 需要进行哪些更改。这可以最大程度地减少更改数量并减少对后端处理的影响，从而加快周转时间。在后掩模流程中，ECO 更改被映射到可用门或释放门。 Conformal ECO Designer 会通知用户任何资源短缺情况。该解决方案使 Faraday 能够处理复杂的 ECO，否则这些复杂的 ECO 需要花费大量时间，甚至可能无法使用传统的手动方法来执行。
运营影响
数量效益
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